Solutions To Number Systems And Binary Addition/Subtraction Problems

Question 1 — Number Systems

Question 1 – Number system:

The student number is S3543535. So, the last 5 digits are 43535.

Hence, (43535)₁₀ = 1*2^(15) + 0*2^(14) + 1*2^(13) + 0*2^(12) + 1*2^(11) + 0*2^(10) + 1*2^(9) + 0*2^(8) + 0*2^(7) + 0*2^(6) + 0*2^(5) + 0*2^(4) + 1*2^3 + 1*2^2 + 1*2^1 + 1*2^0 = (1010101000001111)₂

Now, grouping by three bit and then evaluating by three bit, the binary number can be converted into octal equivalent.

(43535)₁₀ = (001 010 101 000 001 111)₂ = (125017)₈

For converting the binary number into hexadecimal equivalent, the binary numbers are grouped by 4 bits.

(43535)₁₀ = (1010 1010 0000 1111)₂ = (AA0F)₁₆.

1. The last five digits (43535)₁₀can be converted into base 12 number by dividing the number by 12 and then listing the remainder in reverse order.

43535/12 = 3627*12 + 11

Now, 3627/12 = 12*302 + 3

302/12 = 12*25 + 2

25/12 = 12*2 + 1

2/12 = 12*0 + 2

Hence, the number in base 12 will be (43535)₁₀ = (2123B)₁₂

1. The name of the student is Yazeed Othman.

Hence, the first three letters of the name are ‘YAZ’.

The last three letters of the digit are ‘MAN’.

Hence, (YAZ)₂₆ and (MAN)₂₆ will be added.

Now, (YAZ)₂₆ = 24*(26^2) + 0*(26) + 25*(26^0) = 16224 + 25 = (16249)₁₀

(MAN)₂₆ = 12*(26^2) + 0*26 + 13*(26^0) = (8125)₁₀

Now, adding the decimal equivalents gives (16249)₁₀ + (8125)₁₀ = (24374)₁₀

Now, (24374)₁₀ is converted into base 26 number by dividing it consecutively by 26 and then arranging the remainders in reverse order.

24374/26 = 937*26 + 12

937/26 = 26*36 + 1

36/26 = 26*1 + 10

1/26 = 26*0 + 1

Hence, (24374)₁₀ = (BKBM)₂₆

Hence, (YAZ)₂₆ + (MAN)₂₆ = (BKBM)₂₆

Question 2:

1. The last two digits of the student number is 35. Hence, A = 3 and B = 5

and -A = -3, -B = -5.

So, A = 3₁₀ = 0011₂

B = 0101₂

Now, in 6-bit representation, negative of a number is the 2’s complement of the unsigned number.

So, -A = One’s complement of 000011₂ + 1

= 111100 +1 = (111101)₂

-B = One’s complement of 000101₂ + 1 = 111010 + 1 = 111011₂

1. The two 4-bit unsigned numbers are added in binary form by the binary arithmetic rule.

The binary arithmetic rule is the following.

1 + 1 = 0(carry 1), 1+0 = 1, 0+1 = 1 and 0+0 = 0.

Hence, (A+B) = 0011 + 0101 = (1000)₂

Now, checking this by decimal addition.

0011 + 0101 = 3+ 5 = 8 = (1000)₂.

Hence, the binary addition holds in 4-bit arithmetic.

1. Now, in two’s complement 6 bit arithmetic (-A-B) is performed in the following way.

(-A-B) = – 3 – 5 =  (111101)₂ + 111011₂ = (1111000)₂

Here, the MSB represents the signed bit which is negative.

Now, again 2’s complementing the result we find the final result.

One’s complement of 111000 + 1 = 000111 + 1 = 001000 = 8₁₀

Hence, the signed result will be -8.

Question 3:

1. Bits in 1 and 5^thposition is set and all other bits are reset.

Hence, the bit mask will be (00010010).

Bitwise operators will be used in first step will be OR in bit 1 and bit 5 position.

Bitwise operators will be used in the second step will be AND in bit 0,2,3,4,6,7 position.

1. Now, inverting the values of bit 3 and 4 will change the bit mask to (00001010).

The bitwise operators that are used are two XOR gates in bit 3 and bit 4 position respectively.

Question 4:

For, the above circuit the equivalent Boolean expression is

O = ((AB + C’)’ + D)’ss

The equivalent Boolean expression of the above circuit is

O = AB + C’ + D’

The truth table of the first expression is the following.

A	B	C	D	E	F	G	O
1	1	1	1	1	0	0	1
1	1	1	0	1	0	0	0
1	1	0	1	1	1	1	0
1	1	0	0	1	1	1	1
1	0	1	1	0	0	1	0
1	0	1	0	0	0	1	1
1	0	0	1	0	1	0	1
1	0	0	0	0	1	0	0
0	1	1	1	0	0	1	0
0	1	1	0	0	0	1	1
0	1	0	1	0	1	0	1
0	1	0	0	0	1	0	0
0	0	1	1	0	0	1	0
0	0	1	0	0	0	1	1
0	0	0	1	0	1	0	1
0	0	0	0	0	1	0	0

The truth table of the second expression is the following.

A	B	C	D	E	F	G	O
1	1	1	1	1	0	0	1
1	1	1	0	1	0	1	0
1	1	0	1	1	1	0	0
1	1	0	0	1	1	1	1
1	0	1	1	0	0	0	0
1	0	1	0	0	0	1	1
1	0	0	1	0	1	0	1
1	0	0	0	0	1	1	0
0	1	1	1	0	0	0	0
0	1	1	0	0	0	1	1
0	1	0	1	0	1	0	1
0	1	0	0	0	1	1	0
0	0	1	1	0	0	0	0
0	0	1	0	0	0	1	1
0	0	0	1	0	1	0	1
0	0	0	0	0	1	1	0

1. Hence, it is evident that the truth table of final output O is same for both the circuits. Hence, the second expression is the simplified form of the first expression.

Question 5:

1. The retrieved binary code is 11001010.

The code can be written in standard form.

1	1	0	0	1	0	1	0
P8	D7	D6	D5	P4	D3	P2	P1

The parity bits are in position 2^0,2^1, 2^2 and 2^3 position.

The data bits are in 3^rd, 4^th, 5^th and 6^th position. Hence, the data bit is 1000.

Now, by the SECDED code the parity bit P1 depends on D3, D5 and D7.

D3,D5,D7 = 001

Hence, for odd parity P1 = 0.

P2 depends on D3,D6 and D7

D3,D6,D7 = 001

For odd parity P2 = 0

But, in the code P2 = 1

Hence, there is an error.

Next, P4 depends on D5, D6 and D7.

D5, D6, D7 = 001

For odd parity P4 = 0

But, in the signal P4 = 1

Next, P8 depends on D3,D5,D6

D3,D5,D6 = 000

Now, P8 = 1 for odd parity.

Hence, the signal contains error.

1. b) Hence, if the Data bit D6 is 1 instead of 0 then the parity bits will be matched.

So, the corrected signal will be 11101010.

Question 6:

1. The CSMA/CD works based on detection of a collision in the data transmission medium and then back off occurs based on necessity. At the time of transmission of the frame, the medium is checked to realize if the medium is busy. If there is no current then it is assumed that no other transmission is occurring (Lin & Zhang, 2018). The current level is also overseen for detecting the collision. If collision is detected then a special jamming signal is sent to notify all the receivers about the position of the collision. At this time the sender will receive the jamming signal and abortion occurs after detection of CRC failure.
2. The back-off time algorithm in CSMA/CD working is inbuilt in the system. When a node is unable to send a data packet as the medium is under use, it needs to wait for a certain time which is known as “back-off time” (Chakraborty et al., 2016). The exact calculation of the back off time is generally exponential i.e. the back off time increases with the increase in number of full channel by the node (Al-Humairi & Probst, 2016). By the Zigbee method of algorithm the max value of back off period increases with the increase in number of failure of sending packet.
3. The basic difference between CSMA/CD and CSMA/CA is that the former one deals with the transmission after occurrence of the collision while, the later protocol deals with the transmission such that collision do not occur before occurrence of any collision. Both protocols are under 802.11 networking protocol.

Question 7:

1. a)By the IEEE 754 standards the 16-bit floating point representation of the number is the following. The 15^thbit is the sign bit, bit 10 to bit 14 is the exponent bits and bit 0 to bit 9 is the fraction bits.

Representation diagram:

1. b)1₁₀= (000001.0000000000)₂ (in 16-bit floating point form)

10₁₀ = (001010.0000000000)₂

(1/3)₁₀ = (001010.0101010101)₂

1. c) The student number is S3543535.

So, the last two digits are 35.

A= 5 and B = 3

Hence, x = A + B/10 = 5 + 0.3 = 5.3

And y = B + A/10 = 3 + 5/10 = 3.5

1. i) (5.3)₁₀= (000101.0100110011)₂

(3.5)₁₀ = (000011.1000000000)₂

1. ii) The number x and y can be added using the binary addition rule and the result is obtained and then converted into decimal.

(5.3)₁₀ + (3.5)₁₀ = (000101.0100110011)₂ + (000011.1000000000)₂ = (001000.1100110011)₂ = (8.8)₁₀

1. d) When adding two large number in floating point format the order that should be maintained is LSB to LSB addition and the carry will be forwarded to the next bit. Any, other addition method will have some errors in it. The operation in MSB should be performed at last excluding the Sign bit.

Reference list:

Al-Humairi, A., & Probst, A. (2016, June). Back-Off Time Calculation Algorithms in WSN. In Informatics (Vol. 3, No. 2, p. 9). Multidisciplinary Digital Publishing Institute.

Chakraborty, D., Islam, M. I., Azad, A. K., & Rahaman, A. S. M. M. (2016). Performance Analysis of CSMA/CA Network using Modified State Transition Chain. International Journal of Computer Science and Information Security, 14(12), 1064.

Lin, P., & Zhang, L. (2018, May). Full-Duplex RTS/CTS Aided CSMA/CA Mechanism for Visible Light Communication Network with Hidden Nodes under Saturated Traffic. In 2018 IEEE International Conference on Communications (ICC) (pp. 1-6). IEEE.